`include "Sequence.v"
`include "Display.v"
// This module is for testing the Display module by iterating
// its clock, and changing the sequence whenever the Display
// module has displayed its entire sequence.
module Driver (Leds);
    output [3:0] Leds;

    reg SequenceClock;
    wire [31:0] Sequence;

    reg DisplayClock;
    reg DisplayReset;
    wire [3:0] DisplayLeds;
    wire [3:0] LastIndex;
    wire Done;

    reg Clock;
    wire Reset;
	reg Print;

    // We have one each of the Sequence module and the Display module.
    // The output of Sequence is wired as an input to Display.
    Sequence curSequence (Reset, Sequence);
    Display curDisplay (Clock, Reset, Sequence, Leds, LastIndex, Done);

    assign Reset = LastIndex == 15;

    initial begin
        SequenceClock <= 0;
        Clock <= 0;
		Print <= 0;
		// Ignore the last column - it's just to force a line to
		// print even if Leds, LastIndex, and Done remain
		// unchanged.
        $display("LEDs LstI D Sequence________________________ ign");
        $monitor("%b %b %b %b (%b)", Leds, LastIndex, Done, Sequence, Print);
        // Wait 5,000 simulation cycles and then exit simulation.
        #5000 $finish;
    end

    always begin
        // Wait 10 simulation cycles and then flip clock
        #10 Clock = ~Clock;
    end

	always @(posedge Clock or posedge Reset) begin
		// This is just so that $monitor will display a new line
		Print = ~Print;
	end
endmodule