CSci 330 Schedule

I'll update the schedule as the semester progresses to reflect what we actually cover. The section references refer to corresponding sections to Patterson and Hennessy. (Sometimes the textbook covers things we don't in class; and sometimes we cover things in class that the textbook doesn't. You're responsible for what is we see in class. But the textbook is certainly fruitful reading.)

Wed 23 Aug Ch 1 Hardware trends
RISC/load-store v CISC/memory-register
Fri 25 Aug 2.1-2.4 MIPS assembly intro (reference card)
Translation to machine code
Mon 28 Aug 2.5-2.7,2.9 Other MIPS user-mode instructions
Leaf subroutines
Wed 30 Aug MIPS stack
Callee-save registers
Fri 1 Sep Ch 4, 5.1-5.4 Performance assessment
Single-cycle MIPS implementation
Sep 4 Labor day
Wed 6 Sep 5.5 Single-cycle implementation, cont'd
Multi-cycle implementation
Fri 8 Sep Verilog examples
Mon 11 Sep Verilog, cont'd
Wed 13 Sep 6.1, 6.2, 6.3, 6.6 Pipelining basics
Fri 15 Sep 6.4, 6.5 Register forwarding
Static multiple-issue architecture
Mon 18 Sep 6.9 Dynamic multiple-issue architecture
Intel Core Microarchitecture
Wed 20 Sep Branch prediction
Memory aliasing
Simultaneous multithreading
Fri 22 Sep Actual circuit layout
Quiz 1
Mon 25 Sep Proj 2 discussion
Multiprocessing intro
Wed 27 Sep 9.3, 9.5 Shared memory vs message passing
Cache coherency via snooping
Fri 29 Sep Presentation topic summary
Multi-core microprocessors
Mon 2 Oct Vector processors
Wed 4 Oct Vector processors, cont'd
Fri 6 Oct Midterm
Mon 9 Oct Midterm postmortem
Wed 11 Oct Internet history
OSI stack
Oct 12-13 Fall break
Mon 16 Oct Fourier series
Wed 18 Oct Modems
Fri 20 Oct Error detection & correction
Hamming error correction
Mon 23 Oct Itanium/IA-64 (Russel Reed)
Wed 25 Oct PowerPC (Ian Hill)
Fri 27 Oct CRC error correction
Mon 30 Oct microcontrollers (Jared Keahey)
Wed 1 Nov picoJava (Lee Kaufman)
CRC analysis, cont'd.
Fri 3 Nov Ethernet introduction & media
Mon 6 Nov graphics processing units (Thomas Przybylinski)
Wed 8 Nov PDP-11 (Daniel Levy)
Fri 10 Nov nVidia G80 design
Quiz 2
Mon 13 Nov analytical engine (Greg Potter)
Wed 15 Nov Ethernet history
collision handling
Fri 17 Nov Ethernet protocol
Mon 20 Nov logical link control sublayer
sliding window protocol
Nov 22-24 Thanksgiving break
Mon 27 Nov routing algorithms
Wed 29 Nov IP v4 protocol
Fri 1 Dec IP v6 protocol
reversible computing
Mon 4 Dec quantum computing
Wed 13 Dec Final, 2:00pm